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EL5127, EL5227, EL5327, EL5427
Data Sheet September 9, 2005 FN7111.2
2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail Buffers
The EL5127, EL5227, EL5327, and EL5427 are low power, high voltage rail-to-rail input/output buffers designed for use in reference voltage buffering applications in small LCD displays. They are available in quad (EL5127), octal (EL5227), 10-channel (EL5327), and 12-channel (EL5427) topologies. All buffers feature a -3dB bandwidth of 2.5MHz and operate from just 133A per buffer. This family also features a continuous output drive capability of 30mA (sink and source). The quad channel EL5127 is available in the 10-pin MSOP package. The 8-channel EL5227 is available in both the 20pin TSSOP and 24-pin QFN packages, the 10-channel EL5327 in the 24-pin TSSOP and 24-pin QFN packages, and the 12-channel EL5427 in the 28-pin TSSOP and 32-pin QFN packages. All buffers are specified for operation over the full -40C to +85C temperature range.
Features
* 2.5MHz -3dB bandwidth * Supply voltage = 4.5V to 16.5V * Low supply current (per buffer) = 133A * High slew rate = 2.2V/s * Rail-to-rail input/output swing * Ultra-small packages * Pb-free plus anneal available (RoHS compliant)
Applications
* TFT-LCD drive circuits * Electronic games * Touch-screen displays * Personal communication devices * Personal digital assistants (PDAs) * Portable instrumentation
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2004, 2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL5127, EL5227, EL5327, EL5427 Ordering Information
PART NUMBER EL5127CY EL5127CY-T7 EL5127CY-T13 EL5127CYZ (Note) EL5127CYZ-T7 (Note) EL5127CYZ-T13 (Note) EL5227CL EL5227CL-T7 EL5227CL-T13 EL5227CLZ (Note) EL5227CLZ-T7 (Note) EL5227CLZ-T13 (Note) EL5227CR EL5227CR-T7 EL5227CR-T13 EL5227CRZ (Note) EL5227CRZ-T7 (Note) PACKAGE 10-Pin MSOP 10-Pin MSOP 10-Pin MSOP 10-Pin MSOP (Pb-Free) 10-Pin MSOP (Pb-Free) 10-Pin MSOP (Pb-Free) 24-Pin QFN 24-Pin QFN 24-Pin QFN 24-Pin QFN (Pb-Free) 24-Pin QFN (Pb-Free) 24-Pin QFN (Pb-Free) 20-Pin TSSOP 20-Pin TSSOP 20-Pin TSSOP 20-Pin TSSOP (Pb-Free) 20-Pin TSSOP (Pb-Free) TAPE & REEL 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" PKG. DWG. # MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0046 MDP0046 MDP0046 MDP0046 MDP0046 MDP0046 MDP0044 MDP0044 MDP0044 MDP0044 MDP0044 MDP0044 MDP0046 MDP0046 MDP0046 PART NUMBER EL5327CLZ (Note) EL5327CLZ-T7 (Note) EL5327CLZ-T13 (Note) EL5327CR-T7 EL5327CR-T13 EL5327CRZ (Note) EL5327CRZ-T7 (Note) PACKAGE 24-Pin QFN (Pb-Free) 24-Pin QFN (Pb-Free) 24-Pin QFN (Pb-Free) 24-Pin TSSOP 24-Pin TSSOP 24-Pin TSSOP (Pb-Free) 24-Pin TSSOP (Pb-Free) TAPE & REEL 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" PKG. DWG. # MDP0046 MDP0046 MDP0046 MDP0044 MDP0044 MDP0044 MDP0044 MDP0044 MDP0046 MDP0046 MDP0046 MDP0046 MDP0046 MDP0046 MDP0044 MDP0044 MDP0044 MDP0044 MDP0044 MDP0044
EL5327CRZ-T13 24-Pin TSSOP (Note) (Pb-Free) EL5427CL EL5427CL-T7 EL5427CL-T13 EL5427CLZ (Note) EL5427CLZ-T7 (Note) EL5427CLZ-T13 (Note) EL5427CR EL5427CR-T7 EL5427CR-T13 EL5427CRZ (Note) EL5427CRZ-T7 (Note) 32-Pin QFN 32-Pin QFN 32-Pin QFN 32-Pin QFN (Pb-Free) 32-Pin QFN (Pb-Free) 32-Pin QFN (Pb-Free) 28-Pin TSSOP 28-Pin TSSOP 28-Pin TSSOP 28-Pin TSSOP (Pb-Free) 28-Pin TSSOP (Pb-Free)
EL5227CRZ-T13 20-Pin TSSOP (Note) (Pb-Free) EL5327CL EL5327CL-T7 EL5327CL-T13 24-Pin QFN 24-Pin QFN 24-Pin QFN
EL5427CRZ-T13 28-Pin TSSOP (Note) (Pb-Free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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EL5127, EL5227, EL5327, EL5427 Pinouts
EL5127 (10-PIN MSOP) TOP VIEW
VIN1 1 VIN2 2 VS+ 3 VIN3 4 VIN4 5 10 VOUT1 9 VOUT2 8 VS7 VOUT3 6 VOUT4
EL5227 (20-PIN TSSOP) TOP VIEW
VIN1 1 VIN2 2 VIN3 3 VIN4 4 VS+ 5 VS+ 6 VIN5 7 VIN6 8 VIN7 9 VIN8 10 20 VOUT1 19 VOUT2 18 VOUT3 17 VOUT4 16 VS15 VS14 VOUT5 13 VOUT6 12 VOUT7 11 VOUT8 VIN1 1 VIN2 2 VIN3 3 VIN4 4 VIN5 5 VS+ 6 VS+ 7 VIN6 8 VIN7 9
EL5327 (24-PIN TSSOP) TOP VIEW
24 VOUT1 23 VOUT2 22 VOUT3 21 VOUT4 20 VOUT5 19 VS18 VS17 VOUT6 16 VOUT7 15 VOUT8 14 VOUT9 13 VOUT10 VIN1 1 VIN2 2 VIN3 3 VIN4 4 VIN5 5 VIN6 6 VS+ 7 VS+ 8 VIN7 9
EL5427 (28-PIN TSSOP) TOP VIEW
28 VOUT1 27 VOUT2 26 VOUT3 25 VOUT4 24 VOUT5 23 VOUT6 22 VS21 VS20 VOUT7 19 VOUT8 18 VOUT9 17 VOUT10 16 VOUT11 15 VOUT12
VIN8 10 VIN9 11 VIN10 12
VIN8 10 VIN9 11 VIN10 12 VIN11 13 VIN12 14
EL5227, EL5327 (24-PIN QFN) TOP VIEW
21 VOUT1* 20 VOUT2 23 VIN1* 24 VIN2 32 VIN2 31 VIN1
EL5427 (32-PIN QFN) TOP VIEW
27 VOUT1 26 VOUT2 25 VOUT3 24 VOUT4 23 VOUT5 22 VOUT6 THERMAL PAD 21 VS20 VOUT7 19 VOUT8 18 VOUT9 17 VOUT10 VIN11 10 NC 12 NC 13 NC 14 VOUT12 15 VOUT11 16 VIN12 11
22 NC
30 NC
29 NC
VIN3 1 VIN4 2 VIN5 3 VS+ 4 VIN6 5 VIN7 6 VIN8 7 NC 10 VOUT10* 11 CVIN10* 9 VOUT9 12 VIN9 8 THERMAL PAD
19 VOUT3 18 VOUT4 17 VOUT5 16 VS15 VOUT6 14 VOUT7 13 VOUT8
VIN3 1 VIN4 2 VIN5 3 VIN6 4 VS+ 5 VIN7 6 VIN8 7 VIN9 8 VIN10 9
* NOT AVAILABLE IN EL5227
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28 NC
EL5127, EL5227, EL5327, EL5427
Absolute Maximum Ratings (TA = 25C)
Supply Voltage Between VS+ and VS-. . . . . . . . . . . . . . . . . . . .+18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . VS- -0.5V, VS +0.5V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA ESD Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN AV
VS+ = +5V, VS- = -5V, RL = 10k, CL = 10pF to 0V, TA = 25C, unless otherwise specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
Input Offset Voltage Average Offset Voltage Drift Input Bias Current Input Impedance Input Capacitance Voltage Gain
VCM = 0V (Note 1) VCM = 0V
1 5 2 1 1.35
15
mV V/C
50
nA G pF
-4.5V VOUT 4.5V
0.99
1.01
V/V
OUTPUT CHARACTERISTICS VOL VOH IOUT (max) Output Swing Low Output Swing High Max Output Current (Note 2) IL = -5mA IL = +5mA RL = 10 4.85 100 -4.95 4.95 120 30 -4.85 V V mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 2.25V to 7.75V No load (EL5127) No load (EL5227) No load (EL5327) No load (EL5427) DYNAMIC PERFORMANCE SR tS BW CS NOTES: 1. Measured over operating temperature range. 2. Instantaneous peak current. 3. Slew rate is measured on rising and falling edges. Slew Rate (Note 3) Settling to +0.1% (AV = +1) -3dB Bandwidth Channel Separation -4.0V VOUT 4.0V, 20% to 80% (AV = +1), VO = 2V step RL = 10k, CL = 10pF f = 100kHz 0.9 2.2 900 2.5 75 V/s ns MHz dB 55 80 0.7 1.2 1.4 1.6 0.9 1.4 2 2.2 dB mA mA mA mA
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EL5127, EL5227, EL5327, EL5427
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN AV Input Offset Voltage Average Offset Voltage Drift Input Bias Current Input Impedance Input Capacitance Voltage Gain 0.5V VOUT 4.5V 0.99 VCM = 2.5V (Note 1) VCM = 2.5V 1 5 2 1 1.35 1.01 50 15 mV V/C nA G pF V/V VS+ = +5V, VS- = 0V, RL = 10k, CL = 10pF to 2.5V, TA = 25C, unless otherwise specified. CONDITION MIN TYP MAX UNIT
DESCRIPTION
OUTPUT CHARACTERISTICS VOL VOH IOUT (max) Output Swing Low Output Swing High Output Current (Note 2) IL = -5mA IL = +5mA RL = 10 4.85 100 80 4.95 120 150 mV V mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 4.5V to 15.5V No load (EL5127) No load (EL5227) No load (EL5327) No load (EL5427) DYNAMIC PERFORMANCE SR tS BW CS NOTES: 1. Measured over operating temperature range. 2. Instantaneous peak current. 3. Slew rate is measured on rising and falling edges. Slew Rate (Note 3) Settling to +0.1% (AV = +1) -3dB Bandwidth Channel Separation 1V VOUT 4V, 20% to 80% (AV = +1), VO = 2V step RL = 10k, CL = 10pF f = 5MHz 0.9 1.5 1000 2.5 75 V/s ns MHz dB 55 80 0.7 1.1 1.35 1.5 0.9 1.35 1.9 2.05 dB mA mA mA mA
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EL5127, EL5227, EL5327, EL5427
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN AV Input Offset Voltage Average Offset Voltage Drift Input Bias Current Input Impedance Input Capacitance Voltage Gain 0.5V VOUT 14.5V 0.99 VCM = 7.5V (Note 1) VCM = 7.5V 1 5 2 1 1.35 1.01 50 18 mV V/C nA G pF V/V VS+ = +15V, VS- = 0V, RL = 10k, CL = 10pF to 7.5V, TA = 25C, unless otherwise specified. CONDITION MIN TYP MAX UNIT
DESCRIPTION
OUTPUT CHARACTERISTICS VOL VOH IOUT (max) Output Swing Low Output Swing High Output Current (Note 2) IL = -5mA IL = +5mA RL = 10 14.85 100 50 14.95 120 150 mV V mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 4.5V to 15.5V No load (EL5127) No load (EL5227) No load (EL5327) No load (EL5427) DYNAMIC PERFORMANCE SR tS BW CS NOTES: 1. Measured over operating temperature range. 2. Instantaneous peak current. 3. Slew rate is measured on rising and falling edges. Slew Rate (Note 3) Settling to +0.1% (AV = +1) -3dB Bandwidth Channel Separation 1V VOUT 14V, 20% to 80% (AV = +1), VO = 2V step RL = 10k, CL = 10pF f = 5MHz 0.9 2.2 900 2.5 75 V/s ns MHz dB 55 80 0.75 1.3 1.5 1.6 0.95 1.55 2.1 2.4 dB mA mA mA mA
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EL5127, EL5227, EL5327, EL5427 Typical Performance Curves
20 NORMALIZED MAGNITUDE (dB) 10 0 -10 -20 -30 1K 562 150 20 NORMALIZED MAGNITUDE (dB) 10 0 -10 -20 -30 1K 1nF 100pF
CL=10pF VS=5V 10k 1k
RL=10k VS=5V 47pF 12pF
10K
100K
1M
10M
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. FREQEUNCY RESPONSE FOR VARIOUS RL
FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS CL
OUTPUT IMPEDANCE ()
1600 1200 800 400 0 1K
TA=25C VS=5V
MAXIMUM OUTPUT SWING (VP-P)
2000
12 10 8 6 4 2 VS=5V RL=10k CL=12pF TA=25C 100K 1M 10M
10K
100K
1M
0 10K
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 4. MAXIMUM OUTPUT SWING vs FREQUENCY
300 VOLTAGE NOISE (nV/Hz)
0.12 0.1 THD + NOISE (%)
100
0.08 0.06 0.04 0.02 0 1K
10
1K
10K
100K
1M
10M
100M
10K FREQUENCY (Hz)
100K
FREQUENCY (Hz)
FIGURE 5. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY
FIGURE 6. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
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EL5127, EL5227, EL5327, EL5427 Typical Performance Curves
100 90 80 OVERSHOOT (%) 70 60 50 40 30 20 0 10 100 CAPACITANCE (pF) 1K 18 VS=5V RL=10k VIN=50mV TA=25C 16 14 % OF BUFFERS 12 10 8 6 4 2 0 -8 -6 -4 -2 0 2 4 6 -10 8 INPUT OFFSET VOLTAGE (mV) 10 85 85
FIGURE 7. SMALL SIGNAL OVERSHOOT vs LOAD CAPACITANCE
FIGURE 8. INPUT OFFSET VOLTAGE DISTRIBUTION
3.5 INPUT BIAS CURRENT (nA) 3 2.5 2 1.5 1
OUTPUT HIGH VOLTAGE (V)
VS=5V
4.955 4.95 4.945 4.94 4.935 4.93 4.925
VS=5V IOUT=5mA
-35
-15
5
25
45
65
85
-35
-15
5
25
45
65
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 9. INPUT BIAS CURRENT vs TEMPERATURE
FIGURE 10. OUTPUT HIGH VOLTAGE vs TEMPERATURE
-4.938 OUTPUT LOW VOLTAGE (V) -4.942 -4.946 -4.95 -4.954 -4.958
VS=5V IOUT=-5mA VOLTAGE GAIN (V/V)
1.0045 1.004 1.0035 1.003 1.0025 1.002 1.0015
VS=5V
-35
-15
5
25
45
65
85
1.001
-35
-15
5
25
45
65
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 11. OUTPUT LOW VOLTAGE vs TEMPERATURE
FIGURE 12. VOLTAGE GAIN vs TEMPERATURE
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EL5127, EL5227, EL5327, EL5427 Typical Performance Curves
2.255 SUPPLY CURRENT (mA) 0.185 0.18 0.175 0.17 0.165 0.16
VS=5V
SLEW RATE (V/s)
2.245
2.235
2.225 VS=5V 2.215 -40 -20
0
20
40
60
80
-35
-15
5
25
45
65
85
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 13. SLEW RATE vs TEMPERATURE
FIGURE 14. SUPPLY CURRENT PER CHANNEL vs TEMPERATURE
0.195 SUPPLY CURRENT (mA) 0.19 0.185 0.18 0.175 0.17 0.165
TA=25C
1V/DIV
4
6
8
10
12
14
16
18 4s/DIV
SUPPLY VOLTAGE (V)
FIGURE 15. SUPPLY CURRENT PER CHANNEL vs SUPPLY VOLTAGE
FIGURE 16. LARGE SIGNAL TRANSIENT RESPONSE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 3 POWER DISSIPATION (W) 2.5 2.703W 2 1.5 QFN24 JA=37C/W QFN32 JA=35C/W 2.857W
20mV/DIV
1 870mW 0.5 0 MSOP10 JA=115C/W 0 25 50 75 85 100 125 150
1s/DIV
AMBIENT TEMPERATURE (C)
FIGURE 17. SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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EL5127, EL5227, EL5327, EL5427 Typical Performance Curves
1.4 POWER DISSIPATION (W) 1.2 1 1.111W 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 TSSOP28 JA=75C/W TSSOP20 JA=90C/W JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.333W POWER DISSIPATION (W) 1.176W TSSOP24 JA=85C/W 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 150 486mW MSOP10 JA=206C/W JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 758mW 714mW QFN32 JA=132C/W QFN24 JA=140C/W
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
0.9 POWER DISSIPATION (W) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 833mW 714mW 781mW TSSOP28 JA=120C/W
TSSOP24 JA=128C/W TSSOP20 JA=140C/W 0 25 50 75 85 100 125
AMBIENT TEMPERATURE (C)
FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Applications Information
Product Description
The EL5127, EL5227, EL5327, and EL5427 unity gain buffers are fabricated using a high voltage CMOS process. It exhibits rail-to-rail input and output capability and has low power consumption (120A per buffer). These features make the EL5127, EL5227, EL5327, and EL5427 ideal for a wide range of general-purpose applications. When driving a load of 10k and 12pF, the EL5127, EL5227, EL5327, and EL5427 have a -3dB bandwidth of 2.5MHz and exhibits 2.2V/s slew rate.
temperatures of -40C to +85C. Parameter variations with operating voltage and/or temperature are shown in the typical performance curves. The output swings of the EL5127, EL5227, EL5327, and EL5427 typically extend to within 80mV of positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 22 shows the input and output waveforms for the device. Operation is from 5V supply with a 10k load connected to GND. The input is a 10VP-P sinusoid. The output voltage is approximately 9.985VP-P.
Operating Voltage, Input, and Output
The EL5127, EL5227, EL5327, and EL5427 are specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range of 4.5V to 16.5V. Most EL5127, EL5227, EL5327, and EL5427 specifications are stable over both the full supply range and operating
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EL5127, EL5227, EL5327, EL5427
5V 10s
application to determine if load conditions need to be modified for the buffer to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to:
INPUT
T JMAX - T AMAX P DMAX = ------------------------------------------- JA
5V
VS=5V TA=25C VIN=10VP-P
OUTPUT
where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or:
P DMAX = i [ V S x I SMAX + ( V S + - V OUT i ) x I LOAD i ]
FIGURE 22. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT
Short Circuit Current Limit
The EL5127, EL5227, EL5327, and EL5427 will limit the short circuit current to 120mA if the output is directly shorted to the positive or the negative supply. If an output is shorted indefinitely, the power dissipation could easily increase such that the device may be damaged. Maximum reliability is maintained if the output continuous current never exceeds 30mA. This limit is set by the design of the internal metal interconnects.
Output Phase Reversal
The EL5127, EL5227, EL5327, and EL5427 are immune to phase reversal as long as the input voltage is limited from VS- -0.5V to VS+ +0.5V. Figure 23 shows a photo of the output of the device with the input voltage driven beyond the supply rails. Although the device's output will not change phase, the input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diodes placed in the input stage of the device begin to conduct and overvoltage damage could occur.
1V 10s
when sourcing, and:
P DMAX = i [ V S x I SMAX + ( V OUT i - V S - ) x I LOAD i ]
when sinking. where: i = 1 to Total number of buffers VS = Total supply voltage ISMAX = Maximum quiescent current per channel VOUTi = Maximum output voltage of the application ILOADi = Load current If we set the two PDMAX equations equal to each other, we can solve for RLOADi to avoid device overheat. The package power dissipation curves provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous equation, it is a simple matter to see if PDMAX exceeds the device's power derating curves.
1V
VS=2.5V TA=25C VIN=6VP-P
FIGURE 23. OPERATION WITH BEYOND-THE-RAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5127, EL5227, EL5327, and EL5427 buffer, it is possible to exceed the 125C "absolute-maximum junction temperature" under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the
Unused Buffers
It is recommended that any unused buffer have the input tied to the ground plane.
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EL5127, EL5227, EL5327, EL5427
Driving Capacitive Loads
The EL5127, EL5227, EL5327, and EL5427 can drive a wide range of capacitive loads. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The buffers drive 10pF loads in parallel with 10k with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5 and 50) can be placed in series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150 and 10nF are typical. The advantage of a snubber is that it does not draw any DC load current or reduce the gain.
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible, and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1F ceramic capacitor should be placed from VS+ pin to VS- pin. A 4.7F tantalum capacitor should then be connected from VS+ pin to ground. One 4.7F capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 12

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